[gPXE] [PATCH] [pciextra] Restore the PCI COMMAND register after writing to the BARs

[Shao Miller]

I wrote:
> Bernhard Kohl wrote:
>>
>> Hi,
>>
>> This seems to be necessary for some types of PCI devices. We got problems
>> when using gPXE in KVM virtual machines with direct PCI device access.
>>
>> The PCI spec says:
>> Decode (I/O or memory) of a register is disabled via the command
>> register before
>> sizing a Base Address register. Software saves the original value of the
>> Base
>> Address register, writes 0FFFFFFFFh to the register, then reads it back.
>> ...
>> The original value in the Base Address register is restored before
>> reenabling
>> decode in the command register of the device.
>>
> Thanks, Bernhard.  This has been noted at 
> http://support.etherboot.org/index.php?do=details&task_id=40

Bernhard, I notice that we might actually wish to disable memory space 
access...  I've made a modified patch, attached.  Could you please test 
it out?  Also available at: 
http://git.etherboot.org/?p=people/sha0/gpxe.git;a=commitdiff;h=86761eafd7451b084ca67c3b10852e50a85f9ee1

Thanks again!

- Shao Miller
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