[gPXE] [Etherboot-developers] [PATCH] [pciextra] Restore the PCI COMMAND register after writing to the BARs

[Stefan Hajnoczi]

On Thu, Jan 21, 2010 at 4:22 AM, Shao Miller
<Shao.Miller at yrdsb.edu.on.ca> wrote:
> Bernhard Kohl wrote:
> This seems to be necessary for some types of PCI devices. We got problems
> when using gPXE in KVM virtual machines with direct PCI device access.

Is this PCI device pass-through (assigning physical PCI devices to
VMs), or are you referring to the gPXE PCIAPI_DIRECT config option?

> The PCI spec says:
> Decode (I/O or memory) of a register is disabled via the command
> register before
> sizing a Base Address register. Software saves the original value of the
> Base
> Address register, writes 0FFFFFFFFh to the register, then reads it back.
> ...
> The original value in the Base Address register is restored before
> reenabling
> decode in the command register of the device.

Is decode disabled to prevent the BAR resource from overlapping other
things in the memory map?  Perhaps someone with PCI knowledge can
confirm this.

> The PCI spec says:
> Decode (I/O or memory) of a register is disabled via the command
> register before
[...]
> +       /* Disable memory space access */
> +       pci_write_config_word ( pci, PCI_COMMAND, cmd & ~PCI_COMMAND_MEM );

And IO decode should be disabled too?

Stefan