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====== Balaji Rao: USB Support Project ====== ===== Journal ===== ==== Week 5 ==== === Wednesday, June 25th === Began cleaning up the UHCI controller source code to include proper error handling. Wrote a document that describes the [[design of the UHCI driver|http://etherboot.org/wiki/soc/2008/balajirrao/notes/uhci_design]]. === Tuesday, June 24th === Wrote a driver for a USB Ethernet adapter. Its called pegasus. Only the tx part works at the moment. I also wrote a [[http://balajirrao.wordpress.com/2008/06/26/usb-data-snooping/|blog entry]] on snooping USB traffic. Commit : [[http://git.etherboot.org/?p=people/balajirrao/gpxe.git;a=commit;h=186721a5c8045becd3d19db7f33039720947b040|pegasus device driver]] === Monday, June 23rd === Removed FSBR as suggested by mcb30. To compensate for that the TD's DEPTH flag is set so that the TDs of a particular urb are processed first in a depth first fashion. Began porting a USB driver for Belkin F5D5050 USB Ethernet from the linux kernel. ==== Week 4 ==== === Friday, Jun 20th === whole day spent in optimizing performance. Looking at the timing calculations, I realised that I had omitted a trick that enabled full speed bandwidth reclamation. (FSBR). After enabling it, QEMU becomes notoriously slow. trying it on bare metal I got a speed of ~425 KB/s! That's good :) {{:soc:2008:balajirrao:journal:screenshot-system_monitor.png|}} === Thursday, Jun 19th === First of all, I apologize to all who've been following my journal on a regular basis. I could not keep it updated because I was totally disconnected from the internet for almost 3 days now. There's very good progress this week. I've been actually able to boot from my USB NIC from within QEMU and even on bare metal. The download speed is *very* slow, about 30 KB/s on qemu and 50 KB/s on bare metal (with lots of debugging output on the screen). I hope it will certainly improve after some optimizations which I shall begin trying now. So here's a screenshot of QEMU booting from my HTTP server located in my LAN at 192.168.1.3. {{:soc:2008:balajirrao:journal:screenshot-qemu.png|}} ==== Week 3 ==== === Saturday, June 14th === Whole day spent on identifying the reason for tx failure. Looked like a very scary bug. Spend more than 10 hours debugging it. Finally I tracked it down to the improper setting of the Data Toggle synchronization bits. Next comes the rx part which is the most interesting. I'll hopefully clean up the source and commit it tomorrow. === Friday, June 13th === Decided to try running gPXE on bare metal. The UHCI host controller is detected properly. But the MAC address reading failed. Sat down to debug it whole day and fixed it before the meeting! But no packets seemed to come out the adapter. === Thursday, June 12th === Lots, lots of coding. But no commits! :-\ The happiest part is that, the USB NIC sends out packets as seen by wireshark. Its exciting to see packets flow! I'll break up code into smaller pieces and commit them by tomorrow. {{:soc:2008:balajirrao:journal:wireshark_capture_1.png|}} === Wednesday, June 11th === Commit : [[http://rom.etherboot.org/cgi-bin/gitweb.cgi?p=people/balajirrao/gpxe.git;a=commit;h=39590abe9428f4f56d69ec1dbb2caf7c21c1a3ca|39590abe9428f4f56d69ec1dbb2caf7c21c1a3ca]] Various descriptors are now obtained successfully. Reading endpoint descriptors gives us valuable information like Max Packet Size, end point address etc. {{:soc:2008:balajirrao:journal:gpxe-epdesc.png|}} === Tuesday, June 10th === Commit : [[http://rom.etherboot.org/cgi-bin/gitweb.cgi?p=people/balajirrao/gpxe.git;a=commit;h=ceac0a49b4d08d6f9a113dbafba049a86ccc01e1|ceac0a49b4d08d6f9a113dbafba049a86ccc01e1]] Started working on writing code to obtain various descriptors from the device. Then comes setting a configuration in the device. Once this is done, the device is usable. We can start sending and receiving packets through its endpoints. === Monday, June 9th === Commit : [[http://rom.etherboot.org/cgi-bin/gitweb.cgi?p=people/balajirrao/gpxe.git;a=commit;h=03d5d0339af5ba08af9faefd5f5159e057758c5c|03d5d0339af5ba08af9faefd5f5159e057758c5c]] The device when attached answers at the default address (zero). We need to eventually set a unique address using a SET_ADDRESS control message. This commit adds support for assigning addresses to usb device. I've verified that this works by sending a GET_DESCRIPTOR to the new address. Next comes configuration, interface support. Setting interfaces, and configurations. After this comes bulk transactions. Commit : [[http://rom.etherboot.org/cgi-bin/gitweb.cgi?p=people/balajirrao/gpxe.git;a=commit;h=e4fa5d0f8e77ec5ddef8258c7c63b3d912459352|e4fa5d0f8e77ec5ddef8258c7c63b3d912459352]] Attempted to use the linker table mechanism for automatic inclusion of usb drivers. Created a dm9601.c - USB device driver for dm9601(0a46:9601). Did not work. I wonder it has something to do with the filename. It works in some paths, sometimes. But not all. Sent a mail to SoC mentors and mcb30 regarding this. Awaiting reply.. ==== Week 2 ==== === June 8th === Commits : [[http://rom.etherboot.org/cgi-bin/gitweb.cgi?p=people/balajirrao/gpxe.git;a=commit;h=5ce9d4fbf8a2a83622e0d396e47e61426a4a0169|5ce9d4fbf8a2a83622e0d396e47e61426a4a0169]] Whole day spent in debugging and analysing "on-the-wire" USB data. The effort was really worthwhile. We're now able to obtain the device descriptor by querying the device. Below is a QEMU screenshot. {{:soc:2008:balajirrao:journal:device_probe.png|}} === June 7th === Commits : [[http://rom.etherboot.org/cgi-bin/gitweb.cgi?p=people/balajirrao/gpxe.git;a=commit;h=a4e2572312450318358da5e32d3e8cad0cde379a|a4e2572312450318358da5e32d3e8cad0cde379a]] Added debugging routines that dump information about QH, TD, UHCI Host Controller and Root Hub ports. This has been very useful in debugging. The Host controller now to executes the schedule continuously. I was trying to send a Control Transaction to obtain the device descriptor of the device attached. But the TD of the SETUP packet is failing with a CRC/Timeout error. Looks like the device is not receiving the packet, probably because it did not receive a sufficiently long RESET on its port. === June 5th and 6th === Commits : [[http://rom.etherboot.org/cgi-bin/gitweb.cgi?p=people/balajirrao/gpxe.git;a=commit;h=794c411c1ec236996f39ae607aac1a2166ecf64e|794c411c1ec236996f39ae607aac1a2166ecf64e]], [[http://rom.etherboot.org/cgi-bin/gitweb.cgi?p=people/balajirrao/gpxe.git;a=commit;h=f8ced896bcd37046a4ac8919ed3f57480e1b94bf|f8ced896bcd37046a4ac8919ed3f57480e1b94bf]] Finished writing the support for sending control messages. Also complete is the code to retrieve the device descriptors. It is still buggy at the moment. I plan to fix it by tomorrow. Prepared a document describing the design of the USB subsystem. Click [[http://www.etherboot.org/wiki/soc/2008/balajirrao/notes/usb_gpxe_design|here]]. === June 2nd === Began writing infrastructure to support sending of control messages to a devices. This enables us to talk to them and retrieve their device descriptors. A lot of progress is achieved once we're able to send control messages. ==== Week 1 ==== === May 30th === Wrote code to initialize the UHCI controller registers and initialize the frame list and create skeleton queue heads. The next step is to write methods to create control Transfer descriptors and queue them in the schedule. This can be used to fetch the device descriptor of the device, and hence identify its vendor, etc. No testable code yet. So no commits beyond the first one! === May 28th === mcb30 did a quick review of my code today and pointed out some minor mistakes. Now my PCI driver recognizes its device and claims it.It also obtains the number of ports on the root hub. The next step is to talk to the root hub to initialize it. After this, we talk to the devices and initialize them. The problem is, even to talk to the root hub, we need all our TD, QHs, Framelist and other parts of the UHCI schedule to be up. This is because, the root hub is nothing but a special USB device which comes first on the bus. So, I'm afraid I wont be able to do any testing for some days now. === May 26th === Coding began. Talked to mcb30 on how to get started. According to my initial roadmap, I wouldn't be able to test anything till week 4. He suggested that I have something to test right on week 1. He told me to wrote a PCI driver for the USB host controller that'll claim its device. ==== Week 0 ==== === May 25th === Completely studied the Linux Kernel source code on how outbound data is sent to the device. The things remaining are - Device detection and configuration and handling completed USB requests. Also, I need to begin thinking of creating software interfaces for various layers in the USB stack. We could probably avoid including Isochronous data transfer type. This should simplify a lot of things, especially we can do away with bandwidth calculation and things. So the main aim now is to handle Bluk, Control and interrupt transfer types very well. Coding begins tomorrow. I'm excited! === May 20th === Wrote a brief document on how the USB and the host controller operate. mcb30 asked me to write it in more detail. Started studying the Linux kernel source code to understand various data structures and to learn in exact detail how it works. Its good to read from an implementation than read the specification. === May 19th === Journal created. Spoke to mcb30 and mdc on IRC and began to make notes about how USB works at a hardware level. Notes on that are [[..:notes:usb_outline|here]].


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