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soc:2009:asdlkf:journal:week6 [2009/06/29 16:47]
asdlkf created
soc:2009:asdlkf:journal:week6 [2009/06/30 00:23]
asdlkf
Line 1: Line 1:
-June 29:+June 29 6:45 PM:
  
 Current status: Up until now, I have completed most of the data structure definitions,​ skge_probe(),​ and skge_open(). I am obviously quite behind compared to my project plan, but that is not something I can easily resolve; However; It does look like I will have time still left over at the end of writing the skge driver for some other prospects in this task. Possibly tg3? Current status: Up until now, I have completed most of the data structure definitions,​ skge_probe(),​ and skge_open(). I am obviously quite behind compared to my project plan, but that is not something I can easily resolve; However; It does look like I will have time still left over at the end of writing the skge driver for some other prospects in this task. Possibly tg3?
  
 So, after basicly 3 days off (except for a little work on saturday during and after my meeting) I'm ready to get going. It's 6:47 PM and I'm about to start on skge_transmit(). So, after basicly 3 days off (except for a little work on saturday during and after my meeting) I'm ready to get going. It's 6:47 PM and I'm about to start on skge_transmit().
 +
 +
 +June 29 2:00 AM (really June 30):
 +
 +It's been a productive night; I discovered and fixed another memory issue with the allocation of Adapter;
 +Once that was dealt with, I implemented skge_transmit and skge_poll.
 +I'm not certian as I haven'​t setup wireshark yet, but I believe that I just saw my skge driver transmit it's first packet. ​
 +
 +I also pretty much overhaulled the DBGP commands so that anyone interested in writing a driver can literally just look at the output and understand all that is going on.
 +
 +<​code>​
 +
 +skge_probe - start
 +|
 +|-> Allocating 88 bytes of private space
 +|-> Registering skge_operations with the core
 +|-> Creating link to device
 +|-> Allocated 68 bytes for the adapter at 0x18d74
 +|-> Zero out from 0x18d74 to 0x19f84
 +|-> Adapter Base set to 18d7c
 +|-> ioaddr set to d800
 +|-> Using IRQ Number 10
 +|-> Assigned the Back and pdev pointers
 +|-> Defining the length of the regiser locations
 +|-> Mac Address of Port 1 : 00:​21:​91:​91:​10:​6d
 +|-> Beginning skge_initialize
 +|   ​|->​ Triggering a software reset
 +|   ​|->​ Waiting for one second . . . Done.
 +|   ​|->​ Enabling Test Mode
 +|   ​| ​  ​|->​ Removing error bits
 +|   ​| ​  ​|->​ Disabling Test Mode
 +|   |
 +|   ​|->​ Chip ID:
 +|   ​| ​  ​|->​ Detected ​  : b1
 +|   ​| ​  ​|->​ Reference Examples:
 +|   ​| ​      ​|->​ Genesis ​   : a
 +|   ​| ​      ​|->​ Yukon      : b0
 +|   ​| ​      ​|->​ Yukon Lite : b1
 +|   ​| ​      ​|->​ Yukon LP   : b2
 +|   |
 +|   ​|->​ Detecting Chip Type:
 +|   ​| ​  ​|->​ Marvell
 +|   |
 +|   ​|->​ Configuration Register ​  : 0x93
 +|   ​|->​ Number of Ports Detected : 1
 +|   ​|->​ Chip Revision ​           : 0x9
 +|   ​|->​ Calculating Ram Properties
 +|   ​| ​  ​|->​ ram_size ​                : 65536
 +|   ​| ​  ​|->​ ram_offset ​              : 0
 +|   |
 +|   ​|->​ Interface Mask is Register Value.
 +|   ​|->​ Forking into card specific initialization for Non-Genesis settings
 +|   ​| ​  ​|->​ Switching to VCC
 +|   ​| ​  ​|->​ Checking for stuck hardware bit (not-stuck (good))
 +|   ​| ​  ​|->​ Clearing error bits
 +|   ​| ​  ​|->​ Performing Software Reset
 +|   |
 +|   ​|->​ Stopping the card's hardware clocks
 +|   ​|->​ Turning the LED on
 +|   ​|->​ Enabling the transmit arbiter for port #0
 +|   ​|->​ Setting timeout initial values
 +|   ​|->​ Setting up the clocks
 +|   ​|->​ Resetting port #0
 +|   ​|->​ Entering yukon_reset
 +|   ​| ​  ​|->​ Disabling PHY IRQ's
 +|   ​| ​  ​|->​ Clearing MC Hash 1/4
 +|   ​| ​  ​|->​ Clearing MC Hash 2/4
 +|   ​| ​  ​|->​ Clearing MC Hash 3/4
 +|   ​| ​  ​|->​ Clearing MC Hash 4/4
 +|   ​| ​  ​|->​ Clearing temporary registers
 +|   |
 +|
 +|-> Entering skge_devinit:​ 0
 +|   ​|->​ Linking to private space
 +|   ​|->​ Setting up pointers
 +|   ​|->​ Defining tx (8) and rx (8) ring sizes
 +|   ​|->​ Defining modes, duplexing, and advertising
 +|   ​|->​ Setting link down prior to actual link detection
 +|
 +|-> Registering Netdev
 +|-> Setting Pci Device pointer
 +|-> Exiting skge_probe (return:0)
 +
 +
 +
 +
 +gPXE 0.9.7+ -- Open Source Boot Firmware -- http://​etherboot.org
 +Features: HTTP DNS TFTP AoE iSCSI bzImage COMBOOT ELF Multiboot PXE PXEXT
 +
 +skge_open - start
 +|
 +|-> Defining Receive Buffer of 1536
 +yukon_mac_init - Yukon Lite >= A3 - Yukon Lite >= A3 - Autoneg enabled. - flow:S or R-
 +Function: yukon_init - start
 +Function: yukon_init - end
 +yukon_mac_init - endadapter : 101748
 +rxqaddr : 85956
 +port    : 0
 +ram_addr: 0
 +chunk: 32768
 +skge_open - end - return 0
 +net0: 00:​21:​91:​91:​10:​6d on PCI00:08.0 (open)
 +  [Link:down, TX:0 TXE:0 RX:0 RXE:0]
 +Waiting for link-up on net0...skge : phy interrupt status 0x40 0x8100
 +skge : phy interrupt status 0x9040 0x514c
 +skge : phy interrupt status 0x5c60 0x7d2c
 +Yukon - link up - startskge net0: Link is up at 100 Mbps, full duplex
 +Yukon - link up - end ok
 +DHCP (net0 00:​21:​91:​91:​10:​6d).skge_transmit - start
 +skge_transmit - end
 +skge : phy interrupt status 0x0 0x6d2c
 +skge : phy interrupt status 0x0 0x6d2c
 +skge : phy interrupt status 0x0 0x6d2c
 +skge : phy interrupt status 0x0 0x6d2c
 +skge : phy interrupt status 0x0 0x6d2c
 +skge : phy interrupt status 0x0 0x6d2c
 +skge : phy interrupt status 0x0 0x6d2c
 +skge : phy interrupt status 0x0 0x6d2c
 +skge : phy interrupt status 0x0 0x6d2c
 +.skge_transmit - start
 +skge_transmit - end
 +skge : phy interrupt status 0x0 0x6d2c
 +
 +
 +
 +</​code>​
 +
  
 -- Chris -- Chris

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