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       <dc:date>2026-04-06T03:27:14-07:00</dc:date>
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        <dc:date>2008-07-31T05:53:36-07:00</dc:date>
        <title>soc:2008:balajirrao:notes:qemu_hack</title>
        <link>http://etherboot.org/wiki/soc/2008/balajirrao/notes/qemu_hack?rev=1217508816&amp;do=diff</link>
        <description>diff --git a/qemu/hw/pc.c b/qemu/hw/pc.c
index da4a608..5338f3b 100644
--- a/qemu/hw/pc.c
+++ b/qemu/hw/pc.c
@@ -1102,7 +1102,7 @@ static void pc_init1(ram_addr_t ram_size, int vga_ram_size,
 	      smp_cpus);
 
     if (pci_enabled &amp;&amp; usb_enabled) {
-        usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
+	    usb_ohci_init_pci(pci_bus, 2, -1);
     }
 
     if (pci_enabled &amp;&amp; acpi_enabled) {</description>
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    <item rdf:about="http://etherboot.org/wiki/soc/2008/balajirrao/notes/start?rev=1219867237&amp;do=diff">
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        <dc:date>2008-08-27T13:00:37-07:00</dc:date>
        <title>soc:2008:balajirrao:notes:start</title>
        <link>http://etherboot.org/wiki/soc/2008/balajirrao/notes/start?rev=1219867237&amp;do=diff</link>
        <description>Balaji Rao: USB Support Project

Notes

	*  How USB support works at a hardware level
	*  Specifications
		*  EHCI Host Controller Specification - &lt;http://www.intel.com/technology/usb/ehcispec.htm&gt;
		*  EHCI Host Controller Specification - &lt;http://developer.intel.com/technology/usb/uhci11d.htm&gt;
		*  USB Specification  - &lt;http://www.usb.org/developers/docs/usb_20_040908.zip&gt;

	*  A nice article on Linux USB. - &lt;http://www.linuxjournal.com/node/8093/print&gt;

	*  USB subsystem data structures and de…</description>
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        <dc:date>2008-06-26T03:26:44-07:00</dc:date>
        <title>soc:2008:balajirrao:notes:uhci_design</title>
        <link>http://etherboot.org/wiki/soc/2008/balajirrao/notes/uhci_design?rev=1214476004&amp;do=diff</link>
        <description>UHCI Driver Desgin



An example schedule is shown above. It consists of a frame list made up of 1024 frames. In each frame, the UHCI controller inserts number of TDs that can fit into a it. The gPXE since we don't support isochronous TDs, the UHCI starts scanning at the first Queue Head (QH). It executes the first TD queued below, sets its status, updates the QH to point to the executed TD's next TD, and goes to the next QH. Thus, UHCI executes one TD belonging to a particular QH at a time. Thi…</description>
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        <dc:date>2008-07-31T06:21:38-07:00</dc:date>
        <title>soc:2008:balajirrao:notes:uhci_port_reset_issue</title>
        <link>http://etherboot.org/wiki/soc/2008/balajirrao/notes/uhci_port_reset_issue?rev=1217510498&amp;do=diff</link>
        <description>Issue with reset timing on UHCI root hub

A printf placed between PR (Port Reset) deassert and PE (Port Enable) assert was causing a lot of trouble. Without that, get device descriptor operation used to fail. Reasonably we thought it to be a timing issue. mdelay(100), mdelay(1000), and even mdelay(10000) did not work.</description>
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        <dc:date>2008-08-27T12:48:44-07:00</dc:date>
        <title>soc:2008:balajirrao:notes:usb_driver_guide</title>
        <link>http://etherboot.org/wiki/soc/2008/balajirrao/notes/usb_driver_guide?rev=1219866524&amp;do=diff</link>
        <description>gPXE USB Device Driver Guide

This is almost exactly similar to the way in which Linux USB device drivers are written, except that it is simplified greatly. For example, we don't have the ability to change the device configuration, or choose an alternative setting for an interface. We're not entirely sure if we would need it. But we never had devices that support multiple configurations, or alternate settings. So if anyone has such a device and wants to get it to work with gPXE, we are willing t…</description>
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        <dc:date>2008-06-06T04:14:46-07:00</dc:date>
        <title>soc:2008:balajirrao:notes:usb_gpxe_design</title>
        <link>http://etherboot.org/wiki/soc/2008/balajirrao/notes/usb_gpxe_design?rev=1212750886&amp;do=diff</link>
        <description>Design of the USB subsystem

The initial plan was to follow linux kernel with this. But it's come out quite differently due to our assumptions which simplify things.

Some important Data Structures

Host Controller

The most important one is the abstraction of the USB host controller itself. It's pretty similar to how the Linux kernel does it, but simpler.</description>
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        <dc:date>2008-05-25T13:04:42-07:00</dc:date>
        <title>soc:2008:balajirrao:notes:usb_outline</title>
        <link>http://etherboot.org/wiki/soc/2008/balajirrao/notes/usb_outline?rev=1211745882&amp;do=diff</link>
        <description>How USB works

The USB protocol

USB is a polled bus in that devices cannot initiate any communication to the host, not even interrupts. Upon request from the host the device responds. There are four ways in which devices can communicate, given in the order in which they are handled.</description>
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        <dc:date>2008-08-27T12:59:28-07:00</dc:date>
        <title>soc:2008:balajirrao:notes:usb_todo</title>
        <link>http://etherboot.org/wiki/soc/2008/balajirrao/notes/usb_todo?rev=1219867168&amp;do=diff</link>
        <description>TODO

	*  Implement EHCI - We're not entirely sure if this is required. Come and discuss on the IRC if you are interested.
		*  Add support for URB cancellation.
		*  Add support for Interrupt USB Transfer Type
		*  Add support for devices with multiple configurations and interfaces with alternate settings.</description>
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