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Bernhard Kohl wrote:
<blockquote type="cite" cite="mid:4B06ABED.8020108@nsn.com">
<title>[Etherboot-developers] [PATCH] [pciextra] Restore the PCI
COMMAND register after writing to the BARs</title>
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<p><font size="2">Hi,<br>
<br>
This seems to be necessary for some types of PCI devices. We got
problems<br>
when using gPXE in KVM virtual machines with direct PCI device access.<br>
<br>
The PCI spec says:<br>
Decode (I/O or memory) of a register is disabled via the command<br>
register before<br>
sizing a Base Address register. Software saves the original value of the<br>
Base<br>
Address register, writes 0FFFFFFFFh to the register, then reads it back.<br>
...<br>
The original value in the Base Address register is restored before<br>
reenabling<br>
decode in the command register of the device.</font></p>
</blockquote>
Thanks, Bernhard. This has been noted at
<a href="http://support.etherboot.org/index.php?do=details&task_id=40" class="moz-txt-link-freetext">http://support.etherboot.org/index.php?do=details&task_id=40</a><br>
<br>
- Shao Miller<br>
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