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biosext [2008/02/28 05:39] bengen Reformatted links |
biosext [2008/11/19 01:20] (current) markwarren Link to Coreboot dev't section. Reword to avoid implying that it works with all MBs. |
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** Note: This is completely without warranty. It worked for me. It may not work for you. It may wreck your system. If you don't know what you're doing, don't do it. You have no recourse but to blame yourself and sit in the dark rocking in the fetal position if this fails.** | ** Note: This is completely without warranty. It worked for me. It may not work for you. It may wreck your system. If you don't know what you're doing, don't do it. You have no recourse but to blame yourself and sit in the dark rocking in the fetal position if this fails.** | ||
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+ | The "[[http://www.ioss.com.tw/web/English/RD1BIOSSavior.html|RD1 BIOS Savior]]" from [[http://www.ioss.com.tw/|IOSS]] is a US$30 device that can plug into a motherboard BIOS ROM socket to allow manual switching between two BIOS chips. This allows you to boot from one BIOS ROM and then switch to a second BIOS ROM chip for trial flashing. If the new BIOS fails, you can switch back to the first, unmodified BIOS ROM, and try again (info from [[http://en.wikipedia.org/wiki/LinuxBIOS#Developing_and_debugging_coreboot|Coreboot]]). | ||
I am currently using a large number of J7F2WE based motherboards for a computing cluster. The machines have no local storage at all, just a 1 GHz Via C7 processor and 1 GB of RAM. The on-board NIC on the motherboard is based on the VIa Rhine II chipset. My machines also have three more NICs per box, but they don't factor in to getting gPXE loaded. gPXE replaces the Intel PXE code included for the on-board NIC. | I am currently using a large number of J7F2WE based motherboards for a computing cluster. The machines have no local storage at all, just a 1 GHz Via C7 processor and 1 GB of RAM. The on-board NIC on the motherboard is based on the VIa Rhine II chipset. My machines also have three more NICs per box, but they don't factor in to getting gPXE loaded. gPXE replaces the Intel PXE code included for the on-board NIC. | ||
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=== Grab the CBROM utility === | === Grab the CBROM utility === | ||
- | This is the magic tool that makes it possible. CBROM comes in various flavours, you can read more about it [[here|biosmodule]] | + | This is the magic tool that makes it possible. CBROM comes in various flavours, you can read more about it [[biosmodule|here]] |
* CBROM 1.xx is for Award BIOS 4.5 series only | * CBROM 1.xx is for Award BIOS 4.5 series only | ||
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=== Identify your NIC chipset === | === Identify your NIC chipset === | ||
- | I learned how to do this [[romburning|here]]: | + | (I learned how to do this [[romburning|here]].) |
Boot your system in to linux and then run: | Boot your system in to linux and then run: | ||
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Scan the output for your onbaord NIC, mine showed up as: | Scan the output for your onbaord NIC, mine showed up as: | ||
- | root@bops1-cf:~# lspci | + | # lspci |
- | + | ... | |
- | -- snip -- | + | |
00:12.0 Ethernet controller: VIA Technologies, Inc. VT6102 [Rhine-II] (rev 78) | 00:12.0 Ethernet controller: VIA Technologies, Inc. VT6102 [Rhine-II] (rev 78) | ||
- | -- snip -- | ||
To build a gPXE ROM via Rom-o-matic, we need to know the vendor and chipset id's. | To build a gPXE ROM via Rom-o-matic, we need to know the vendor and chipset id's. | ||
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Using the infromation from above, lets interogate the PCI device: | Using the infromation from above, lets interogate the PCI device: | ||
- | root@bops1-cf:~# lspci -n -s 00:12.0 | + | # lspci -n -s 00:12.0 |
- | 00:12.0 0200: 1106:3065 (rev 78) | + | ... |
+ | 00:12.0 0200: 1106:3065 (rev 78) | ||
Make a note of the vendor and device IDs (1106 and 3065 respectively in the above example). | Make a note of the vendor and device IDs (1106 and 3065 respectively in the above example). | ||
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G:\>CBROM606.EXE J7F2WA14.BIN /D | G:\>CBROM606.EXE J7F2WA14.BIN /D | ||
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CBROM V6.06 (C)Award Software 1999 All Rights Reserved. | CBROM V6.06 (C)Award Software 1999 All Rights Reserved. | ||